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Tutorial Details

Tutorial Title:

Inside the Solid State Transformers

Tutorial Abstract:

Solid State Transformers technology continues to excite researchers in academia and industry. Despite many promises of power-dense high-performance conversion, there are significant challenges encountered in the practical design of these highly modular, galvanically isolated power electronics converters. These stem from high power and high voltage aspects of design, insulation coordination, high voltage magnetic components, thermal aspects, and the complexity of controller hardware and control algorithms. High modularity strongly impacts the reliability and availability of the SST as a whole and has a strong impact on the scalability in terms of voltage, current, and power ratings. Redundancy in design is often adopted, further complicating the realizations of power stages.

The tutorial will systematically address numerous technological aspects inside the MW-level SST design, present commonly used technologies, as well as some first-hand experiences and solutions used or developed at the Power Electronics Laboratory at EPFL, by the instructors. When appropriate, PLECS models and simulations will be used to support the introduced concepts and methods to the audience.

Presenters' Information:
Drazen Dujic

Drazen Dujic

Power Electronics Laboratory, EPFL

Drazen Dujic is an Associate Professor and Director of the Power Electronics Laboratory at the Swiss Federal Institute of Technology (EPFL) in Lausanne, Switzerland. Upon obtaining his PhD degree in 2008, he spent 5 years in industry (with ABB Switzerland) and joined EPFL in 2014. His research interests are mainly in medium-voltage high-power electronics. He has given numerous keynotes and tutorials on the topics of modular multilevel converters, medium-frequency transformer design and optimization, and solid-state transformers. He is an IEEE Fellow.

Zhenchao Li

Zhenchao Li

Power Electronics Laboratory, EPFL

Zhenchao Li is currently a Ph.D. student at the Power Electronics Laboratory of the Swiss Federal Institute of Technology (EPFL) in Lausanne, Switzerland. His PhD research projects is directly related to the Solid-State Transformer technologies for data center applications.

Tutorial Description:

Outline and Schedule (3-hour duration)

Duration Topic Presenter
90 min Part 1: SST Technology Overview and Design Challenges Drazen Dujic
15 min Coffee Break
90 min Part 2: Advanced SST Design Considerations Drazen Dujic, Zhenchao Li
15 min Summary and Conclusions Drazen Dujic

Part 1: SST Technology Overview and Design Challenges (90 minutes)

  • Applications driving the development of the SST technology
  • SST technology overview and design challenges
  • SST topologies overview and emerging concepts
  • The SST scalability challenges in terms of voltage, current, and power
  • Distributed SST control hardware and software (including protection)
  • The challenges and trade-offs of high SST modularity

Part 2: Advanced SST Design Considerations (90 minutes)

  • Insulation coordination for medium voltage SST designs
  • Medium frequency transformer design for the SST
  • Auxiliary power supply concepts for SST modules
  • Technologies to realize redundancy concepts inside the SST
  • Minimizing the installed energy storage inside the SST (2nd harmonic problem)
  • SST reliability and availability design considerations
  • Integration considerations for achieving high power density

Summary and Conclusions (15 minutes)

Final remarks summarizing key takeaways from the tutorial, highlighting the most critical design considerations and future trends in Solid State Transformer technology.

Tutorial Style and Requirements:

  • Traditional lectures supported by slides
  • Software demonstration of relevant concepts by means of PLECS simulations
  • The target audience is students and engineers working on the SST technology
  • Tutorial will cover the SST technology from a system-level perspective, without going deeply into mathematical modeling
  • Knowledge of power electronics topologies is advantageous